This invention relates to a sense amplifier circuit used in dynamic RAM, static RAM, etc.
A conventional latch type sense amplifier circuit is explained by referring to FIGS. 1 and 2. FIG. 1 is an equivalent circuit diagram of a conventional latch type sense amplifier circuit, in which numerals 100 and 200 are respectively first N-type transistor (hereinafter called T100) and second N-type transistor (T200) Numerals 3 and 5 are bit wire pair, and 4 is an earth wire. In the equivalent circuit shown in FIG. 1, the operation of amplifying the potential difference V of the bit wire 3 and bit wire 5 by the sense amplifier circuit is as follows. First, taking notice of T100 and T200, since the sources are commonly connected to the earth wire, the difference between the gate-source voltage applied to T100 (hereinafter called Vgs1) and the gate-source voltage applied to T200 (Vgs2) is as expressed below:
xcex94V=|Vgs1xe2x88x92Vgs2| . . . xe2x80x83xe2x80x83(1) 
That is, the potential difference of bit wire pair 3, 5 is the difference of the gate-source voltage applied to T100, T200, which is also the difference of currents i100, i200 flowing in T100, T200. As the currents i100, i200 flow, since these are discharge currents for discharging the electric charge of the bit wires to the earth wire, the potential of bit wire 3 Vbit and the potential of bit wire 5 Vbit decrease by the portions shown below.                               Δ          ⁢                      xe2x80x83                    ⁢                      V            bit                          =                                            i              1                        ·            t                                c            3                                              (        2        )                                          Δ          ⁢                      xe2x80x83                    ⁢                      V            bit                          =                                            i              2                        ·            t                                c            5                                              (        3        )            
where t is the discharge time, and c3, c5 are capacities of bit wires. From the relationship of equations (1), (2), (3), and the relation of xcex94Vbit=xcex94Vgs2, xcex94Vbit=Vgs1, evidently a positive feedback is applied to the potential difference of the bit wire pair 3, 5, and the potential difference is amplified.
One of the important factors to determine the performance of the sense amplifier operating in such manner is the sensitivity. This is to show the smallest limit of potential difference that can be amplified correctly, and the minimum potential difference is called the sensitivity. As stated above, the potential difference of the bit wire pair is the gate-source voltage of MOS transistors T100, T200 and also becomes the potential difference flowing in the transistors, and this potential difference expands the potential difference of bit wire pair, and hence the following point is important. The point is whether the small gate-source voltage difference (the difference of Vgs1 and Vgs2) is correctly obtained as the difference of currents (the difference of i100 and i200) or not. That is, if Vgs1 greater than Vgs2, however small the difference may be, the relation of i100 greater than i200 must be satisfied. To realize this, it is necessary that the threshold voltage and drivabilities gm of MOS transistors T100, T200 be exactly the same.
In order to realize such relations, conventionally, a sense amplifier circuit was realized in the wiring and layout as shown in FIG. 2. This is a layout drawing of an actual sense amplifier circuit. This layout is replaced by an equivalent circuit diagram in FIG. 1. As evident from this drawing, the currents i100, i200 flow in the reverse directions geometrically on the wafer, that is, a semiconductor integrated circuit board.
The sense amplifier circuit of N-type MOS transistors was explained in FIGS. 1 and 2, but the P-type configuration is exactly the same except that the earth wire 4 is Vcc wire, that the MOS transistors 100, 200 are P-type MOS transistors, and that the current directions of both i100 and i200 are reverse.
However, in the sense amplifier circuit as shown in FIGS. 1, 2, the following problems exist because the current i100 flowing in the MOS transistor T100 and the current i200 flowing in the MOS transistor T200 are opposite.
First of all, generally, when forming source and drain of MOS transistor, the ion beam is designed to reach the wafer at a certain angle in order to prevent channeling of ions. Therefore, the overlapping amount of the gate electrode and source region or drain region is asymmetric in the source region and drain region. This tendency becomes more obvious when the angle of the ion beam is deviated more from the angle perpendicular to the wafer surface, or the ratio of thickness to width of gate electrode (aspect ratio=thickness/width) becomes larger. This asymmetricity is considered to be caused, aside from the formation of source and drain, by injection of ions for channel stop of source and drain, asymmetricity of shape of the gate electrode to become injection mask, and asymmetricity of the shape of gate side oxide spacer. This tendency is considered to be intensified as the gate length and gate width becomes smaller, and this problem is a must to be solved in the fine MOS transistors used in large-scale integrated circuit.
Incidentally, when asymmetricity occurs in the ion injection quantity of source and drain, another asymmetricity will naturally occur in the current-voltage characteristic. In other words even in a same transistor, the threshold voltage and drivability gm come to have different values depending on the direction of the flowing current. Thus, as explained in the prior art, in the sense amplifier circuit as shown in FIG. 1, even if it is designed so that the T100 and T200 may have identical threshold voltage and drivability gm, since the directions of the flowing currents are reverse, it is possible, owing to the asymmetricity of the current-voltage characteristic, that the discharge current may be possibly greater in the current i200 flowing in T200 than the current i100 flowing in T100 if the drivability gm is greater in T200 than in T200 although the gate voltage Vgs1 of T100 is greater than gate voltage Vgs2 of T200. Therefore, the small potential difference of the bit wire pair 3, 5 is not amplified correctly, and the potential of the bit wire 5 giving Vgs1 is smaller than the potential of the bit wire 3 giving Vgs2, and the sense amplifier circuit may malfunction.
By the sensitivity S of the sense amplifier and reading from the memory cell, the difference from the potential difference xcex94V occurring in the bit wire pair 3, 5, that is, M in M=xcex94xcex94Vxe2x88x92S, is called a margin. The value of M seems to be much smaller because the reading voltage xcex94V tends to be smaller along with the increase of bit wire capacity and decrease of cell capacity by high integration of memory cell. Hence, higher sensitivity of the sense amplifier circuit is more and more needed. It is therefore important to equalize the threshold voltage and drivability gm of the transistor or pair T100, T200 of the sense amplifier circuit, in consideration of the current direction. In the conventional sense amplifier circuit and layout, however, since the current directions of T100, T200 are opposite, the asymmetricity of the current-voltage characteristic due to asymmetricity of feeding amounts of source and drain has a considerable effect, and the sensitivity of the sense amplifier tends to worsen.
It is hence a primary object of this invention to present a high sensitivity sense amplifier circuit capable of suppressing the asymmetricity of the current-voltage characteristic of transistor pair composing the sense amplifier.
To achieve the above object, the sense amplifier circuit of this invention is composed by coupling the first bit wire coupled to the memory cell and the drain part of first MOS transistor, coupling the second bit wire making a pair with the first bit wire and the gate part of the first MOS transistor, coupling the drain part of second MOS transistor and the second bit wire, coupling the gate part of the second MOS transistor and the first bit wire, coupling the source parts of the first and second MOS transistors commonly to a power source wire, and forming both first MOS transistor and second MOS transistor, out of the N-type of P-type MOS transistors composing the latch type sense amplifier circuit, by a plurality of N-type or P-type MOS transistors connected in series.